Job Details:
Job Description:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
As a Power Integrity Engineer, you will contribute to the development and validation of power delivery solutions for complex, high-speed silicon, package, and platform designs. You will work with cross-functional engineering teams to analyze, optimize, and validate power delivery networks from silicon through package and board.
Your responsibilities will include, but are not limited to :
• Develop and analyze power delivery networks (PDNs) for silicon, packages, boards, and high-speed platforms.
• Perform 2D and 3D electromagnetic model extraction and power-noise analysis across the end-to-end power delivery path, including die/C4 bumps, package, socket, and board.
• Define and evaluate power-grid specifications, power-noise budgets, and design targets to balance power integrity, performance, area, and platform requirements.
• Apply power integrity principles and simulation methodologies to guide package and platform design and physical implementation.
• Analyze PDN impedance, voltage droop, resonance, ground bounce, decoupling effectiveness, and other power-noise characteristics.
• Develop electrical analysis methodologies, test structures, and verification plans for power delivery design and validation.
• Perform laboratory measurements to characterize power noise across frequency, transient response, ground bounce, and other key PDN metrics.
• Correlate post-silicon/platform measurements with pre-silicon simulations and models to improve design accuracy and methodology.
• Evaluate and optimize on-die, package, and platform decoupling strategies.
• Support voltage regulator (VR) performance characterization and optimization as part of the overall platform power delivery solution.
• Develop platform-level power delivery and decoupling recommendations for incorporation into platform design guides.
• Translate silicon power requirements into package and platform-level specifications and support design pathfinding to meet performance and form-factor requirements.
• Collaborate with silicon integration, die floorplanning, package, board/platform, voltage regulator, and validation teams to optimize the end-to-end power delivery solution.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Minimum Qualifications:
• Bachelor's in Electrical Engineering, Mechatronics Engineering, or a related STEM field & 1+ years of experience OR Master's degree in Electrical Engineering, Mechatronics Engineering, or a related STEM field & 0+ years of experience.
• 1+ years of experience in one or more of the following areas:
Power integrity or power delivery.
Power electronics.
Signal integrity.
Voltage regulator design or validation.
PCB/package electrical modeling.
Electrical simulation.
Electrical laboratory testing or validation.
Preferred Qualifications:
The following qualifications are considered a plus:
• Experience with printed circuit board (PCB) and/or semiconductor package design and technology.
• Experience analyzing power delivery networks, including impedance, voltage-noise, transient-response, or decoupling behavior.
• Experience with electrical simulation, electromagnetic extraction, or high-speed design tools such as HSPICE, Ansys HFSS, Keysight ADS, Cadence PowerSI, or Cadence PowerDC.
• Knowledge of transmission-line theory, electromagnetic-field concepts, and passive component parasitics.
• Knowledge of voltage regulator operation, control, transient response, and interaction with platform-level power delivery networks.
• Experience using electrical laboratory equipment such as oscilloscopes, voltage/current probes, power supplies, and related measurement equipment.
• Experience correlating simulation results with laboratory measurements.
• Programming or scripting experience for engineering analysis and automation, such as Python, MATLAB, or similar tools.
• Strong analytical, problem-solving, and technical communication skills.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .
Annual Salary Range for jobs which could be performed in the US: $105,650.00-172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.