Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based connectivity with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This network will service tens of thousands of enterprise, data center, and government users who require reliable connectivity for critical operations.
Job Description Summary
Own project-level FPGA features for space-based high-speed data processing, communications, and signal processing systems. With clear technical direction and some oversight, translate requirements into FPGA implementations, execute verification and timing closure, support hardware integration, and communicate delivery risks and tradeoffs.
About the Role
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We are building systems that make access to space more reliable, cost-effective, and routine. The TeraWave program is seeking an FPGA Designer to design, verify, and integrate FPGA-based systems for high-speed data processing, communications, and signal processing applications.
You will work on a small, multidisciplinary team and contribute FPGA deliverables from requirements through hardware integration and test. The role requires sound engineering judgment, clear documentation, and effective collaboration with systems, RF, avionics, thermal, hardware, and software engineers.
Responsibilities
· Own FPGA features through requirements analysis, technical design, RTL development, functional simulation, synthesis, place-and-route, timing closure, and hardware bring-up with clear direction and some oversight.
· Translate allocated requirements into module architectures, interface definitions, implementation plans, verification objectives, and traceable design documentation.
· Develop maintainable RTL in VHDL, Verilog, or SystemVerilog and integrate vendor, third-party, or internally developed IP cores.
· Develop and maintain verification environments using testbenches, assertions, automated regressions, constrained-random stimulus, or functional coverage as appropriate to the design risk.
· Analyze and resolve timing, resource utilization, clocking, reset, clock-domain crossing, and integration issues for designs of moderate complexity.
· Implement and verify program-defined design-for-test, design-for-manufacturing, and space-grade reliability features, including single-event upset mitigation, triple modular redundancy, scrubbing, error-correcting codes, and fault detection where required.
· Lead bring-up and debug for owned features and perform root-cause analysis of moderate-scope design or test nonconformances; develop and verify corrective actions.
· Participate in preliminary, critical, peer, and test reviews as an author and reviewer; provide constructive feedback and ensure review actions are closed.
· Partner with systems, RF, avionics, thermal, hardware, software, manufacturing, and test engineers to define interfaces and validate end-to-end performance.
· Estimate effort and complexity, identify technical and schedule risks, communicate progress, and recommend practical tradeoffs or mitigation plans.
· Contribute improvements to FPGA coding standards, reusable IP, verification infrastructure, development workflows, and laboratory procedures.
Support qualification, acceptance testing, production troubleshooting, radiation testing, and on-orbit operations for owned designs as needed.
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