Please Note:
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.
What You’ll Do
Our research team identifies data movement bottlenecks in AI systems and solves them with new memory and storage SoC architecture, proving each idea on FPGA with real AI workloads
Location: Daily onsite presence at our Folsom office/headquarters in alignment with our Flexible Work policy
Job ID: 43081
Define architecture and microarchitecture for SoC blocks and prototype them on FPGA
Analyze AI system workloads (e.g., LLM inference) to identify memory, storage, and network bottlenecks
Propose and evaluate novel hardware architectures that address these bottlenecks more efficiently than existing solutions
Design, implement, and debug high-speed interfaces such as Ethernet, PCIe, and memory interfaces
Build high-throughput data paths with efficient buffering and flow control
Develop simulation and lab-based validation, including stress and error-injection testing
Integrate prototypes with host software, servers, and network equipment
Analyze performance, power, and cost trade-offs and translate results into SoC requirements
Lead research from problem definition to publication, patents, and presentations at top-tier conferences
What You Bring
BE (BS/MS/Ph. D. preferred) in Computer/Electrical Engineering or Computer Science with 10+ years of working experiences in architecture development
Research mindset: comfortable defining problems, forming hypotheses, and validating them with experiments
Interest in AI infrastructure and data systems; publications are plus
Strong System Verilog RTL design and debug skills
Proven FPGA timing closure experience on large, high-speed designs
Hands-on experience with at least one high-speed interface (Ethernet, PCIe, or DDR/LPDDR)
Experience in storage (NVMe/SSD), networking (RDMA/RoCE), or memory (CXL) systems
Self-motivated problem-solver with an ability to work well in a team
Inclusive, adapt your style to the situation and diverse global norms of our people.
An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
Innovative and creative, you proactively explore new ideas and adapt quickly to change
#LI-SF1
What We Offer
The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance.
This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.
Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Enjoy Time Away You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
Care for Family Whatever family means to you, we want to…